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Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips

Research article (IEEE Journal of Solid-State Circuits, 2021) · cited 64× · AI/ML
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Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips

Summary

Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips is a scholarly article[1].

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  • Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips's instance of is recorded as scholarly article[2].

Related Entities

Shimeng Yu

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  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips. Retrieved May 24, 2026, from https://4ort.xyz/entity/two-way-transpose-multibit-6t-sram-computing-in-memory-macro-for-inference-training-ai-edge-chips
MLA “Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/two-way-transpose-multibit-6t-sram-computing-in-memory-macro-for-inference-training-ai-edge-chips.
BibTeX @misc{4ortxyz_two-way-transpose-multibit-6t-sram-computing-in-memory-macro-for-inference-training-ai-edge-chips_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips}}, year = {2026}, url = {https://4ort.xyz/entity/two-way-transpose-multibit-6t-sram-computing-in-memory-macro-for-inference-training-ai-edge-chips}, note = {Accessed: 2026-05-24}}
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