Towards GPU HEVC intra decoding: Seizing fine-grain parallelism

Research article (2015 IEEE International Conference on Multimedia and Expo (ICME), 2015) · cited 10× · AI/ML
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Towards GPU HEVC intra decoding: Seizing fine-grain parallelism

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Towards GPU HEVC intra decoding: Seizing fine-grain parallelism is a scholarly article[1].

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APA 4ort.xyz Knowledge Graph. (2026). Towards GPU HEVC intra decoding: Seizing fine-grain parallelism. Retrieved May 24, 2026, from https://4ort.xyz/entity/towards-gpu-hevc-intra-decoding-seizing-fine-grain-parallelism
MLA “Towards GPU HEVC intra decoding: Seizing fine-grain parallelism.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/towards-gpu-hevc-intra-decoding-seizing-fine-grain-parallelism.
BibTeX @misc{4ortxyz_towards-gpu-hevc-intra-decoding-seizing-fine-grain-parallelism_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Towards GPU HEVC intra decoding: Seizing fine-grain parallelism}}, year = {2026}, url = {https://4ort.xyz/entity/towards-gpu-hevc-intra-decoding-seizing-fine-grain-parallelism}, note = {Accessed: 2026-05-24}}
LLM prompt According to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): Towards GPU HEVC intra decoding: Seizing fine-grain parallelism — https://4ort.xyz/entity/towards-gpu-hevc-intra-decoding-seizing-fine-grain-parallelism (retrieved 2026-05-24)

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