SystemVerilog

Summary

SystemVerilog is a hardware description language^[1]. SystemVerilog draws 128 Wikipedia views per month (hardware_description_language category, ranking #3 of 8).^[2]

Key Facts

• SystemVerilog was influenced by Verilog^[3].
• SystemVerilog was influenced by VHDL^[4].
• SystemVerilog's instance of is recorded as hardware description language^[5].
• SystemVerilog's instance of is recorded as programming language^[6].
• SystemVerilog's instance of is recorded as hardware verification language^[7].
• SystemVerilog's Library of Congress authority ID is recorded as sh2012002819^[8].
• SystemVerilog's designed by is recorded as Institute of Electrical and Electronics Engineers^[9].
• +2002-01-01T00:00:00Z marks the founding of SystemVerilog^[10].
• SystemVerilog's Freebase ID is recorded as /m/07lwvb^[11].
• SystemVerilog's readable file format is recorded as SystemVerilog Source Code File^[12].
• SystemVerilog's writable file format is recorded as SystemVerilog Source Code File^[13].
• SystemVerilog's file extension is recorded as sv^[14].
• SystemVerilog's file extension is recorded as svr^[15].
• SystemVerilog's issue tracker URL is recorded as https://accellera.mantishub.io/^[16].
• SystemVerilog's Quora topic ID is recorded as SystemVerilog^[17].
• SystemVerilog's programming paradigm is recorded as structured programming^[18].
• SystemVerilog's programming paradigm is recorded as object-oriented programming^[19].
• SystemVerilog's Microsoft Academic ID is recorded as 2778681875^[20].
• SystemVerilog's typing discipline is recorded as weak typing^[21].
• SystemVerilog's typing discipline is recorded as static typing^[22].
• SystemVerilog's National Library of Israel J9U ID is recorded as 987007590778405171^[23].
• SystemVerilog's Yale LUX ID is recorded as concept/9343c14d-4261-4bd3-abbe-9745c0316982^[24].

Body

Designation and Status

Recorded instance of include hardware description language^[5], programming language^[6], and hardware verification language^[7].

History and Context

+2002-01-01T00:00:00Z marks the founding of SystemVerilog^[10].

Why It Matters

SystemVerilog draws 128 Wikipedia views per month (hardware_description_language category, ranking #3 of 8).^[2] SystemVerilog has Wikipedia articles in 11 language editions, a strong signal of global cultural recognition.^[25]