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Scalable and Dynamic Global Power Management for Multicore Chips

Research article (Proceedings of the 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures, 2015) · cited 12× · AI/ML
academia openalex:W2041148201
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Scalable and Dynamic Global Power Management for Multicore Chips

Summary

Scalable and Dynamic Global Power Management for Multicore Chips is a scholarly article[1].

Key Facts

  • Scalable and Dynamic Global Power Management for Multicore Chips's instance of is recorded as scholarly article[2].

References

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Direct Wikidata claims

  1. [2] ↑ . wikidata.org.

Class ancestry

  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). Scalable and Dynamic Global Power Management for Multicore Chips. Retrieved May 24, 2026, from https://4ort.xyz/entity/scalable-and-dynamic-global-power-management-for-multicore-chips
MLA “Scalable and Dynamic Global Power Management for Multicore Chips.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/scalable-and-dynamic-global-power-management-for-multicore-chips.
BibTeX @misc{4ortxyz_scalable-and-dynamic-global-power-management-for-multicore-chips_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Scalable and Dynamic Global Power Management for Multicore Chips}}, year = {2026}, url = {https://4ort.xyz/entity/scalable-and-dynamic-global-power-management-for-multicore-chips}, note = {Accessed: 2026-05-24}}
LLM prompt According to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): Scalable and Dynamic Global Power Management for Multicore Chips — https://4ort.xyz/entity/scalable-and-dynamic-global-power-management-for-multicore-chips (retrieved 2026-05-24)

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