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Power-Efficient Accelerator Design for Neural Networks Using Computation Reuse

Research article (IEEE Computer Architecture Letters, 2016) · cited 33× · AI/ML
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Power-Efficient Accelerator Design for Neural Networks Using Computation Reuse

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Power-Efficient Accelerator Design for Neural Networks Using Computation Reuse is a scholarly article[1].

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  • Power-Efficient Accelerator Design for Neural Networks Using Computation Reuse's instance of is recorded as scholarly article[2].

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APA 4ort.xyz Knowledge Graph. (2026). Power-Efficient Accelerator Design for Neural Networks Using Computation Reuse. Retrieved May 24, 2026, from https://4ort.xyz/entity/power-efficient-accelerator-design-for-neural-networks-using-computation-reuse
MLA “Power-Efficient Accelerator Design for Neural Networks Using Computation Reuse.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/power-efficient-accelerator-design-for-neural-networks-using-computation-reuse.
BibTeX @misc{4ortxyz_power-efficient-accelerator-design-for-neural-networks-using-computation-reuse_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Power-Efficient Accelerator Design for Neural Networks Using Computation Reuse}}, year = {2026}, url = {https://4ort.xyz/entity/power-efficient-accelerator-design-for-neural-networks-using-computation-reuse}, note = {Accessed: 2026-05-24}}
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