Power-Driven DNN Dataflow Optimization on FPGA

Research article (2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2019) · cited 16× · AI/ML

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Power-Driven DNN Dataflow Optimization on FPGA

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Power-Driven DNN Dataflow Optimization on FPGA is a scholarly article^[1].

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Power-Driven DNN Dataflow Optimization on FPGA's instance of is recorded as scholarly article^[2].

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Tinghuan Chen

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Tinghuan Chen

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[2] ↑ Power-Driven DNN Dataflow Optimization on FPGA — instance of (P31): scholarly article. wikidata.org.

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[1] ↑ Power-Driven DNN Dataflow Optimization on FPGA is an instance of scholarly article (scholarly article) [P31, primary]. Wikidata. wikidata.org.

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4ort.xyz Knowledge Graph. (2026). Power-Driven DNN Dataflow Optimization on FPGA. Retrieved May 24, 2026, from https://4ort.xyz/entity/power-driven-dnn-dataflow-optimization-on-fpga

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“Power-Driven DNN Dataflow Optimization on FPGA.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/power-driven-dnn-dataflow-optimization-on-fpga.

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@misc{4ortxyz_power-driven-dnn-dataflow-optimization-on-fpga_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Power-Driven DNN Dataflow Optimization on FPGA}}, year = {2026}, url = {https://4ort.xyz/entity/power-driven-dnn-dataflow-optimization-on-fpga}, note = {Accessed: 2026-05-24}}

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According to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): Power-Driven DNN Dataflow Optimization on FPGA — https://4ort.xyz/entity/power-driven-dnn-dataflow-optimization-on-fpga (retrieved 2026-05-24)

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