Optimization for Efficient Hardware Implementation of CNN on FPGA

Research article (2018 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), 2018) · cited 32× · AI/ML

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Optimization for Efficient Hardware Implementation of CNN on FPGA

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Optimization for Efficient Hardware Implementation of CNN on FPGA is a scholarly article^[1].

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Optimization for Efficient Hardware Implementation of CNN on FPGA's instance of is recorded as scholarly article^[2].

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Authored by 3

Fasih Ud Din Farrukh, Tuo Xie, Zhihua Wang

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Fasih Ud Din Farrukh, Tuo Xie, Zhihua Wang

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[2] ↑ Optimization for Efficient Hardware Implementation of CNN on FPGA — instance of (P31): scholarly article. wikidata.org.

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[1] ↑ Optimization for Efficient Hardware Implementation of CNN on FPGA is an instance of scholarly article (scholarly article) [P31, primary]. Wikidata. wikidata.org.

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4ort.xyz Knowledge Graph. (2026). Optimization for Efficient Hardware Implementation of CNN on FPGA. Retrieved May 24, 2026, from https://4ort.xyz/entity/optimization-for-efficient-hardware-implementation-of-cnn-on-fpga

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“Optimization for Efficient Hardware Implementation of CNN on FPGA.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/optimization-for-efficient-hardware-implementation-of-cnn-on-fpga.

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@misc{4ortxyz_optimization-for-efficient-hardware-implementation-of-cnn-on-fpga_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Optimization for Efficient Hardware Implementation of CNN on FPGA}}, year = {2026}, url = {https://4ort.xyz/entity/optimization-for-efficient-hardware-implementation-of-cnn-on-fpga}, note = {Accessed: 2026-05-24}}

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