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Low Latency YOLOv3-Tiny Accelerator for Low-Cost FPGA Using General Matrix Multiplication Principle

Research article (IEEE Access, 2021) · cited 45× · AI/ML
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Low Latency YOLOv3-Tiny Accelerator for Low-Cost FPGA Using General Matrix Multiplication Principle

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Low Latency YOLOv3-Tiny Accelerator for Low-Cost FPGA Using General Matrix Multiplication Principle is a scholarly article[1].

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  • Low Latency YOLOv3-Tiny Accelerator for Low-Cost FPGA Using General Matrix Multiplication Principle's instance of is recorded as scholarly article[2].

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  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). Low Latency YOLOv3-Tiny Accelerator for Low-Cost FPGA Using General Matrix Multiplication Principle. Retrieved May 24, 2026, from https://4ort.xyz/entity/low-latency-yolov3-tiny-accelerator-for-low-cost-fpga-using-general-matrix-multiplication-principle
MLA “Low Latency YOLOv3-Tiny Accelerator for Low-Cost FPGA Using General Matrix Multiplication Principle.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/low-latency-yolov3-tiny-accelerator-for-low-cost-fpga-using-general-matrix-multiplication-principle.
BibTeX @misc{4ortxyz_low-latency-yolov3-tiny-accelerator-for-low-cost-fpga-using-general-matrix-multiplication-principle_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Low Latency YOLOv3-Tiny Accelerator for Low-Cost FPGA Using General Matrix Multiplication Principle}}, year = {2026}, url = {https://4ort.xyz/entity/low-latency-yolov3-tiny-accelerator-for-low-cost-fpga-using-general-matrix-multiplication-principle}, note = {Accessed: 2026-05-24}}
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