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HIR: An MLIR-based Intermediate Representation for Hardware Accelerator Description
Research article (Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 4, 2023) · cited 10× · AI/ML
Use these citations when quoting this entity in research, articles, AI prompts, or wherever provenance matters. We aggregate Wikidata + Wikipedia + authoritative open-data sources; the stitched, scored, cross-referenced view is what 4ort.xyz contributes.
APA4ort.xyz Knowledge Graph. (2026). HIR: An MLIR-based Intermediate Representation for Hardware Accelerator Description. Retrieved May 24, 2026, from https://4ort.xyz/entity/hir-an-mlir-based-intermediate-representation-for-hardware-accelerator-description
MLA“HIR: An MLIR-based Intermediate Representation for Hardware Accelerator Description.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/hir-an-mlir-based-intermediate-representation-for-hardware-accelerator-description.
BibTeX@misc{4ortxyz_hir-an-mlir-based-intermediate-representation-for-hardware-accelerator-description_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{HIR: An MLIR-based Intermediate Representation for Hardware Accelerator Description}}, year = {2026}, url = {https://4ort.xyz/entity/hir-an-mlir-based-intermediate-representation-for-hardware-accelerator-description}, note = {Accessed: 2026-05-24}}
LLM promptAccording to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): HIR: An MLIR-based Intermediate Representation for Hardware Accelerator Description — https://4ort.xyz/entity/hir-an-mlir-based-intermediate-representation-for-hardware-accelerator-description (retrieved 2026-05-24)