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Hardware-Software Co-Design for On-Chip Learning in AI Systems

Research article (Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023) · cited 11× · AI/ML
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Hardware-Software Co-Design for On-Chip Learning in AI Systems

Summary

Hardware-Software Co-Design for On-Chip Learning in AI Systems is a scholarly article[1].

Key Facts

  • Hardware-Software Co-Design for On-Chip Learning in AI Systems's instance of is recorded as scholarly article[2].

References

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Direct Wikidata claims

  1. [2] ↑ . wikidata.org.

Class ancestry

  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). Hardware-Software Co-Design for On-Chip Learning in AI Systems. Retrieved May 24, 2026, from https://4ort.xyz/entity/hardware-software-co-design-for-on-chip-learning-in-ai-systems
MLA “Hardware-Software Co-Design for On-Chip Learning in AI Systems.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/hardware-software-co-design-for-on-chip-learning-in-ai-systems.
BibTeX @misc{4ortxyz_hardware-software-co-design-for-on-chip-learning-in-ai-systems_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Hardware-Software Co-Design for On-Chip Learning in AI Systems}}, year = {2026}, url = {https://4ort.xyz/entity/hardware-software-co-design-for-on-chip-learning-in-ai-systems}, note = {Accessed: 2026-05-24}}
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