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Energy-Efficient Architecture for FPGA-based Deep Convolutional Neural Networks with Binary Weights

Research article (2018 IEEE 23rd International Conference on Digital Signal Processing (DSP), 2018) · cited 11× · AI/ML
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Energy-Efficient Architecture for FPGA-based Deep Convolutional Neural Networks with Binary Weights

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Energy-Efficient Architecture for FPGA-based Deep Convolutional Neural Networks with Binary Weights is a scholarly article[1].

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APA 4ort.xyz Knowledge Graph. (2026). Energy-Efficient Architecture for FPGA-based Deep Convolutional Neural Networks with Binary Weights. Retrieved May 24, 2026, from https://4ort.xyz/entity/energy-efficient-architecture-for-fpga-based-deep-convolutional-neural-networks-with-binary-weights
MLA “Energy-Efficient Architecture for FPGA-based Deep Convolutional Neural Networks with Binary Weights.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/energy-efficient-architecture-for-fpga-based-deep-convolutional-neural-networks-with-binary-weights.
BibTeX @misc{4ortxyz_energy-efficient-architecture-for-fpga-based-deep-convolutional-neural-networks-with-binary-weights_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Energy-Efficient Architecture for FPGA-based Deep Convolutional Neural Networks with Binary Weights}}, year = {2026}, url = {https://4ort.xyz/entity/energy-efficient-architecture-for-fpga-based-deep-convolutional-neural-networks-with-binary-weights}, note = {Accessed: 2026-05-24}}
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