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Dual-Line-Systolic Array for High Performance CNN Accelerator

Research article (2022 IEEE 30th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2022) · cited 10× · AI/ML
academia openalex:W4282008392
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Dual-Line-Systolic Array for High Performance CNN Accelerator

Summary

Dual-Line-Systolic Array for High Performance CNN Accelerator is a scholarly article[1].

Key Facts

  • Dual-Line-Systolic Array for High Performance CNN Accelerator's instance of is recorded as scholarly article[2].

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Direct Wikidata claims

  1. [2] ↑ . wikidata.org.

Class ancestry

  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). Dual-Line-Systolic Array for High Performance CNN Accelerator. Retrieved May 24, 2026, from https://4ort.xyz/entity/dual-line-systolic-array-for-high-performance-cnn-accelerator
MLA “Dual-Line-Systolic Array for High Performance CNN Accelerator.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/dual-line-systolic-array-for-high-performance-cnn-accelerator.
BibTeX @misc{4ortxyz_dual-line-systolic-array-for-high-performance-cnn-accelerator_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Dual-Line-Systolic Array for High Performance CNN Accelerator}}, year = {2026}, url = {https://4ort.xyz/entity/dual-line-systolic-array-for-high-performance-cnn-accelerator}, note = {Accessed: 2026-05-24}}
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