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DHyANA: A NoC-based neural network hardware architecture

Research article (2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2016) · cited 16× · AI/ML
academia openalex:W2584255183
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DHyANA: A NoC-based neural network hardware architecture

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DHyANA: A NoC-based neural network hardware architecture is a scholarly article[1].

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  • DHyANA: A NoC-based neural network hardware architecture's instance of is recorded as scholarly article[2].

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Direct Wikidata claims

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  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). DHyANA: A NoC-based neural network hardware architecture. Retrieved May 24, 2026, from https://4ort.xyz/entity/dhyana-a-noc-based-neural-network-hardware-architecture
MLA “DHyANA: A NoC-based neural network hardware architecture.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/dhyana-a-noc-based-neural-network-hardware-architecture.
BibTeX @misc{4ortxyz_dhyana-a-noc-based-neural-network-hardware-architecture_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{DHyANA: A NoC-based neural network hardware architecture}}, year = {2026}, url = {https://4ort.xyz/entity/dhyana-a-noc-based-neural-network-hardware-architecture}, note = {Accessed: 2026-05-24}}
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