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Designing Novel AAD Pooling in Hardware for a Convolutional Neural Network Accelerator

Research article (IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2022) · cited 74× · AI/ML
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Designing Novel AAD Pooling in Hardware for a Convolutional Neural Network Accelerator

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Designing Novel AAD Pooling in Hardware for a Convolutional Neural Network Accelerator is a scholarly article[1].

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  • Designing Novel AAD Pooling in Hardware for a Convolutional Neural Network Accelerator's instance of is recorded as scholarly article[2].

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Direct Wikidata claims

  1. [2] ↑ . wikidata.org.

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  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). Designing Novel AAD Pooling in Hardware for a Convolutional Neural Network Accelerator. Retrieved May 24, 2026, from https://4ort.xyz/entity/designing-novel-aad-pooling-in-hardware-for-a-convolutional-neural-network-accelerator
MLA “Designing Novel AAD Pooling in Hardware for a Convolutional Neural Network Accelerator.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/designing-novel-aad-pooling-in-hardware-for-a-convolutional-neural-network-accelerator.
BibTeX @misc{4ortxyz_designing-novel-aad-pooling-in-hardware-for-a-convolutional-neural-network-accelerator_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Designing Novel AAD Pooling in Hardware for a Convolutional Neural Network Accelerator}}, year = {2026}, url = {https://4ort.xyz/entity/designing-novel-aad-pooling-in-hardware-for-a-convolutional-neural-network-accelerator}, note = {Accessed: 2026-05-24}}
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