Home › Entities › academia › Deep Reinforcement Learning-Based Optimal Decoupling Capacitor Design Method for Silicon Interposer-Based 2.5-D/3-D ICs

Deep Reinforcement Learning-Based Optimal Decoupling Capacitor Design Method for Silicon Interposer-Based 2.5-D/3-D ICs

Research article (IEEE Transactions on Components Packaging and Manufacturing Technology, 2020) · cited 82× · AI/ML
academia openalex:W3005038879
Press Enter · cited answer in seconds

Deep Reinforcement Learning-Based Optimal Decoupling Capacitor Design Method for Silicon Interposer-Based 2.5-D/3-D ICs

Summary

Deep Reinforcement Learning-Based Optimal Decoupling Capacitor Design Method for Silicon Interposer-Based 2.5-D/3-D ICs is a scholarly article[1].

Key Facts

  • Deep Reinforcement Learning-Based Optimal Decoupling Capacitor Design Method for Silicon Interposer-Based 2.5-D/3-D ICs's instance of is recorded as scholarly article[2].

References

Programmatic citations — every numbered marker resolves to a verifiable graph row below.

Direct Wikidata claims

  1. [2] ↑ . wikidata.org.

Class ancestry

  1. [1] ↑ . Wikidata. wikidata.org.

📑 Cite this page

Use these citations when quoting this entity in research, articles, AI prompts, or wherever provenance matters. We aggregate Wikidata + Wikipedia + authoritative open-data sources; the stitched, scored, cross-referenced view is what 4ort.xyz contributes.

APA 4ort.xyz Knowledge Graph. (2026). Deep Reinforcement Learning-Based Optimal Decoupling Capacitor Design Method for Silicon Interposer-Based 2.5-D/3-D ICs. Retrieved May 24, 2026, from https://4ort.xyz/entity/deep-reinforcement-learning-based-optimal-decoupling-capacitor-design-method-for-silicon-interposer-based-2-5-d-3-d-ics
MLA “Deep Reinforcement Learning-Based Optimal Decoupling Capacitor Design Method for Silicon Interposer-Based 2.5-D/3-D ICs.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/deep-reinforcement-learning-based-optimal-decoupling-capacitor-design-method-for-silicon-interposer-based-2-5-d-3-d-ics.
BibTeX @misc{4ortxyz_deep-reinforcement-learning-based-optimal-decoupling-capacitor-design-method-for-silicon-interposer-based-2-5-d-3-d-ics_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Deep Reinforcement Learning-Based Optimal Decoupling Capacitor Design Method for Silicon Interposer-Based 2.5-D/3-D ICs}}, year = {2026}, url = {https://4ort.xyz/entity/deep-reinforcement-learning-based-optimal-decoupling-capacitor-design-method-for-silicon-interposer-based-2-5-d-3-d-ics}, note = {Accessed: 2026-05-24}}
LLM prompt According to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): Deep Reinforcement Learning-Based Optimal Decoupling Capacitor Design Method for Silicon Interposer-Based 2.5-D/3-D ICs — https://4ort.xyz/entity/deep-reinforcement-learning-based-optimal-decoupling-capacitor-design-method-for-silicon-interposer-based-2-5-d-3-d-ics (retrieved 2026-05-24)

Canonical URL: https://4ort.xyz/entity/deep-reinforcement-learning-based-optimal-decoupling-capacitor-design-method-for-silicon-interposer-based-2-5-d-3-d-ics · Last refreshed: