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Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor

Research article (IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019) · cited 19× · AI/ML
academia openalex:W2914935471
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Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor

Summary

Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor is a scholarly article[1].

Key Facts

  • Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor's instance of is recorded as scholarly article[2].

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Direct Wikidata claims

  1. [2] ↑ . wikidata.org.

Class ancestry

  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor. Retrieved May 24, 2026, from https://4ort.xyz/entity/bundle-updatable-sram-based-tcam-design-for-openflow-compliant-packet-processor
MLA “Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/bundle-updatable-sram-based-tcam-design-for-openflow-compliant-packet-processor.
BibTeX @misc{4ortxyz_bundle-updatable-sram-based-tcam-design-for-openflow-compliant-packet-processor_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor}}, year = {2026}, url = {https://4ort.xyz/entity/bundle-updatable-sram-based-tcam-design-for-openflow-compliant-packet-processor}, note = {Accessed: 2026-05-24}}
LLM prompt According to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor — https://4ort.xyz/entity/bundle-updatable-sram-based-tcam-design-for-openflow-compliant-packet-processor (retrieved 2026-05-24)

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