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Area and Energy Efficient 2D Max-Pooling For Convolutional Neural Network Hardware Accelerator

Research article (IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics Society, 2020) · cited 15× · AI/ML
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Area and Energy Efficient 2D Max-Pooling For Convolutional Neural Network Hardware Accelerator

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Area and Energy Efficient 2D Max-Pooling For Convolutional Neural Network Hardware Accelerator is a scholarly article[1].

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APA 4ort.xyz Knowledge Graph. (2026). Area and Energy Efficient 2D Max-Pooling For Convolutional Neural Network Hardware Accelerator. Retrieved May 24, 2026, from https://4ort.xyz/entity/area-and-energy-efficient-2d-max-pooling-for-convolutional-neural-network-hardware-accelerator
MLA “Area and Energy Efficient 2D Max-Pooling For Convolutional Neural Network Hardware Accelerator.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/area-and-energy-efficient-2d-max-pooling-for-convolutional-neural-network-hardware-accelerator.
BibTeX @misc{4ortxyz_area-and-energy-efficient-2d-max-pooling-for-convolutional-neural-network-hardware-accelerator_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Area and Energy Efficient 2D Max-Pooling For Convolutional Neural Network Hardware Accelerator}}, year = {2026}, url = {https://4ort.xyz/entity/area-and-energy-efficient-2d-max-pooling-for-convolutional-neural-network-hardware-accelerator}, note = {Accessed: 2026-05-24}}
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