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Accelerating Tiny YOLOv3 using FPGA-Based Hardware/Software Co-Design

Research article (2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020) · cited 44× · AI/ML
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Accelerating Tiny YOLOv3 using FPGA-Based Hardware/Software Co-Design

Summary

Accelerating Tiny YOLOv3 using FPGA-Based Hardware/Software Co-Design is a scholarly article[1].

Key Facts

  • Accelerating Tiny YOLOv3 using FPGA-Based Hardware/Software Co-Design's instance of is recorded as scholarly article[2].

References

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Direct Wikidata claims

  1. [2] ↑ . wikidata.org.

Class ancestry

  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). Accelerating Tiny YOLOv3 using FPGA-Based Hardware/Software Co-Design. Retrieved May 24, 2026, from https://4ort.xyz/entity/accelerating-tiny-yolov3-using-fpga-based-hardware-software-co-design
MLA “Accelerating Tiny YOLOv3 using FPGA-Based Hardware/Software Co-Design.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/accelerating-tiny-yolov3-using-fpga-based-hardware-software-co-design.
BibTeX @misc{4ortxyz_accelerating-tiny-yolov3-using-fpga-based-hardware-software-co-design_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Accelerating Tiny YOLOv3 using FPGA-Based Hardware/Software Co-Design}}, year = {2026}, url = {https://4ort.xyz/entity/accelerating-tiny-yolov3-using-fpga-based-hardware-software-co-design}, note = {Accessed: 2026-05-24}}
LLM prompt According to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): Accelerating Tiny YOLOv3 using FPGA-Based Hardware/Software Co-Design — https://4ort.xyz/entity/accelerating-tiny-yolov3-using-fpga-based-hardware-software-co-design (retrieved 2026-05-24)

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