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Accelerating low bit-width convolutional neural networks with embedded FPGA

Research article (2017 27th International Conference on Field Programmable Logic and Applications (FPL), 2017) · cited 71× · AI/ML
academia openalex:W2761757071
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Accelerating low bit-width convolutional neural networks with embedded FPGA

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Accelerating low bit-width convolutional neural networks with embedded FPGA is a scholarly article[1].

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  • Accelerating low bit-width convolutional neural networks with embedded FPGA's instance of is recorded as scholarly article[2].

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Direct Wikidata claims

  1. [2] ↑ . wikidata.org.

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  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). Accelerating low bit-width convolutional neural networks with embedded FPGA. Retrieved May 24, 2026, from https://4ort.xyz/entity/accelerating-low-bit-width-convolutional-neural-networks-with-embedded-fpga
MLA “Accelerating low bit-width convolutional neural networks with embedded FPGA.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/accelerating-low-bit-width-convolutional-neural-networks-with-embedded-fpga.
BibTeX @misc{4ortxyz_accelerating-low-bit-width-convolutional-neural-networks-with-embedded-fpga_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Accelerating low bit-width convolutional neural networks with embedded FPGA}}, year = {2026}, url = {https://4ort.xyz/entity/accelerating-low-bit-width-convolutional-neural-networks-with-embedded-fpga}, note = {Accessed: 2026-05-24}}
LLM prompt According to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): Accelerating low bit-width convolutional neural networks with embedded FPGA — https://4ort.xyz/entity/accelerating-low-bit-width-convolutional-neural-networks-with-embedded-fpga (retrieved 2026-05-24)

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