A scalable and efficient convolutional neural network accelerator using HLS for a system-on-chip design
Summary
A scalable and efficient convolutional neural network accelerator using HLS for a system-on-chip design is a scholarly article[1].
Key Facts
A scalable and efficient convolutional neural network accelerator using HLS for a system-on-chip design's instance of is recorded as scholarly article[2].
References
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APA4ort.xyz Knowledge Graph. (2026). A scalable and efficient convolutional neural network accelerator using HLS for a system-on-chip design. Retrieved May 24, 2026, from https://4ort.xyz/entity/a-scalable-and-efficient-convolutional-neural-network-accelerator-using-hls-for-a-system-on-chip-design
MLA“A scalable and efficient convolutional neural network accelerator using HLS for a system-on-chip design.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/a-scalable-and-efficient-convolutional-neural-network-accelerator-using-hls-for-a-system-on-chip-design.
BibTeX@misc{4ortxyz_a-scalable-and-efficient-convolutional-neural-network-accelerator-using-hls-for-a-system-on-chip-design_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{A scalable and efficient convolutional neural network accelerator using HLS for a system-on-chip design}}, year = {2026}, url = {https://4ort.xyz/entity/a-scalable-and-efficient-convolutional-neural-network-accelerator-using-hls-for-a-system-on-chip-design}, note = {Accessed: 2026-05-24}}
LLM promptAccording to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): A scalable and efficient convolutional neural network accelerator using HLS for a system-on-chip design — https://4ort.xyz/entity/a-scalable-and-efficient-convolutional-neural-network-accelerator-using-hls-for-a-system-on-chip-design (retrieved 2026-05-24)
