A hybrid CPU-GPU implementation to accelerate multiple pairwise protein sequence alignment

Research article (2017 8th International Conference on Information and Communication Systems (ICICS), 2017) · cited 10× · AI/ML
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A hybrid CPU-GPU implementation to accelerate multiple pairwise protein sequence alignment

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A hybrid CPU-GPU implementation to accelerate multiple pairwise protein sequence alignment is a scholarly article[1].

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  • A hybrid CPU-GPU implementation to accelerate multiple pairwise protein sequence alignment's instance of is recorded as scholarly article[2].

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APA 4ort.xyz Knowledge Graph. (2026). A hybrid CPU-GPU implementation to accelerate multiple pairwise protein sequence alignment. Retrieved May 24, 2026, from https://4ort.xyz/entity/a-hybrid-cpu-gpu-implementation-to-accelerate-multiple-pairwise-protein-sequence-alignment
MLA “A hybrid CPU-GPU implementation to accelerate multiple pairwise protein sequence alignment.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/a-hybrid-cpu-gpu-implementation-to-accelerate-multiple-pairwise-protein-sequence-alignment.
BibTeX @misc{4ortxyz_a-hybrid-cpu-gpu-implementation-to-accelerate-multiple-pairwise-protein-sequence-alignment_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{A hybrid CPU-GPU implementation to accelerate multiple pairwise protein sequence alignment}}, year = {2026}, url = {https://4ort.xyz/entity/a-hybrid-cpu-gpu-implementation-to-accelerate-multiple-pairwise-protein-sequence-alignment}, note = {Accessed: 2026-05-24}}
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