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A 65 nm 73 kb SRAM-Based Computing-In-Memory Macro With Dynamic-Sparsity Controlling

Research article (IEEE Transactions on Circuits & Systems II Express Briefs, 2022) · cited 31× · AI/ML
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A 65 nm 73 kb SRAM-Based Computing-In-Memory Macro With Dynamic-Sparsity Controlling

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A 65 nm 73 kb SRAM-Based Computing-In-Memory Macro With Dynamic-Sparsity Controlling is a scholarly article[1].

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  • A 65 nm 73 kb SRAM-Based Computing-In-Memory Macro With Dynamic-Sparsity Controlling's instance of is recorded as scholarly article[2].

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  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). A 65 nm 73 kb SRAM-Based Computing-In-Memory Macro With Dynamic-Sparsity Controlling. Retrieved May 24, 2026, from https://4ort.xyz/entity/a-65-nm-73-kb-sram-based-computing-in-memory-macro-with-dynamic-sparsity-controlling
MLA “A 65 nm 73 kb SRAM-Based Computing-In-Memory Macro With Dynamic-Sparsity Controlling.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/a-65-nm-73-kb-sram-based-computing-in-memory-macro-with-dynamic-sparsity-controlling.
BibTeX @misc{4ortxyz_a-65-nm-73-kb-sram-based-computing-in-memory-macro-with-dynamic-sparsity-controlling_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{A 65 nm 73 kb SRAM-Based Computing-In-Memory Macro With Dynamic-Sparsity Controlling}}, year = {2026}, url = {https://4ort.xyz/entity/a-65-nm-73-kb-sram-based-computing-in-memory-macro-with-dynamic-sparsity-controlling}, note = {Accessed: 2026-05-24}}
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