3D IC Design Flow for Hybrid-bonding 3D System on Chip

3D IC Design Flow for Hybrid-bonding 3D System on Chip is a science project.

Event research_grant eu_cordis:894805
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Key Facts

  • Start time: April 1, 2020[1]
  • End time: March 31, 2022[2]
  • Participant: eu_cordis_org:999981149[3]
  • Short name: H-3D-SOC[4]
  • Budget: 178,320 euro[5]
  • Funding scheme: Horizon 2020[6]

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APA 4ort.xyz Knowledge Graph. (2026). 3D IC Design Flow for Hybrid-bonding 3D System on Chip. Retrieved October 8, 2026, from https://4ort.xyz/entity/3d-ic-design-flow-for-hybrid-bonding-3d-system-on-chip
MLA “3D IC Design Flow for Hybrid-bonding 3D System on Chip.” 4ort.xyz Knowledge Graph, 4ort.xyz, 8 Oct. 2026, https://4ort.xyz/entity/3d-ic-design-flow-for-hybrid-bonding-3d-system-on-chip.
BibTeX @misc{4ortxyz_3d-ic-design-flow-for-hybrid-bonding-3d-system-on-chip_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{3D IC Design Flow for Hybrid-bonding 3D System on Chip}}, year = {2026}, url = {https://4ort.xyz/entity/3d-ic-design-flow-for-hybrid-bonding-3d-system-on-chip}, note = {Accessed: 2026-10-08}}
LLM prompt According to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): 3D IC Design Flow for Hybrid-bonding 3D System on Chip — https://4ort.xyz/entity/3d-ic-design-flow-for-hybrid-bonding-3d-system-on-chip (retrieved 2026-10-08)

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