Systolic-CNN: An OpenCL-defined Scalable Run-time-flexible FPGA Accelerator Architecture for Accelerating Convolutional Neural Network Inference in Cloud/Edge Computing

Research article (2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2020) · cited 14× · AI/ML
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Systolic-CNN: An OpenCL-defined Scalable Run-time-flexible FPGA Accelerator Architecture for Accelerating Convolutional Neural Network Inference in Cloud/Edge Computing

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Systolic-CNN: An OpenCL-defined Scalable Run-time-flexible FPGA Accelerator Architecture for Accelerating Convolutional Neural Network Inference in Cloud/Edge Computing is a scholarly article[1].

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APA 4ort.xyz Knowledge Graph. (2026). Systolic-CNN: An OpenCL-defined Scalable Run-time-flexible FPGA Accelerator Architecture for Accelerating Convolutional Neural Network Inference in Cloud/Edge Computing. Retrieved May 24, 2026, from https://4ort.xyz/entity/systolic-cnn-an-opencl-defined-scalable-run-time-flexible-fpga-accelerator-architecture-for-accelerating-convolutional-n
MLA “Systolic-CNN: An OpenCL-defined Scalable Run-time-flexible FPGA Accelerator Architecture for Accelerating Convolutional Neural Network Inference in Cloud/Edge Computing.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/systolic-cnn-an-opencl-defined-scalable-run-time-flexible-fpga-accelerator-architecture-for-accelerating-convolutional-n.
BibTeX @misc{4ortxyz_systolic-cnn-an-opencl-defined-scalable-run-time-flexible-fpga-accelerator-architecture-for-accelerating-convolutional-n_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Systolic-CNN: An OpenCL-defined Scalable Run-time-flexible FPGA Accelerator Architecture for Accelerating Convolutional Neural Network Inference in Cloud/Edge Computing}}, year = {2026}, url = {https://4ort.xyz/entity/systolic-cnn-an-opencl-defined-scalable-run-time-flexible-fpga-accelerator-architecture-for-accelerating-convolutional-n}, note = {Accessed: 2026-05-24}}
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