SiLago-CoG: Coarse-Grained Grid-Based Design for Near Tape-Out Power Estimation Accuracy at High Level

Research article (2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2017) · cited 12× · AI/ML
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SiLago-CoG: Coarse-Grained Grid-Based Design for Near Tape-Out Power Estimation Accuracy at High Level

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SiLago-CoG: Coarse-Grained Grid-Based Design for Near Tape-Out Power Estimation Accuracy at High Level is a scholarly article[1].

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APA 4ort.xyz Knowledge Graph. (2026). SiLago-CoG: Coarse-Grained Grid-Based Design for Near Tape-Out Power Estimation Accuracy at High Level. Retrieved May 24, 2026, from https://4ort.xyz/entity/silago-cog-coarse-grained-grid-based-design-for-near-tape-out-power-estimation-accuracy-at-high-level
MLA “SiLago-CoG: Coarse-Grained Grid-Based Design for Near Tape-Out Power Estimation Accuracy at High Level.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/silago-cog-coarse-grained-grid-based-design-for-near-tape-out-power-estimation-accuracy-at-high-level.
BibTeX @misc{4ortxyz_silago-cog-coarse-grained-grid-based-design-for-near-tape-out-power-estimation-accuracy-at-high-level_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{SiLago-CoG: Coarse-Grained Grid-Based Design for Near Tape-Out Power Estimation Accuracy at High Level}}, year = {2026}, url = {https://4ort.xyz/entity/silago-cog-coarse-grained-grid-based-design-for-near-tape-out-power-estimation-accuracy-at-high-level}, note = {Accessed: 2026-05-24}}
LLM prompt According to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): SiLago-CoG: Coarse-Grained Grid-Based Design for Near Tape-Out Power Estimation Accuracy at High Level — https://4ort.xyz/entity/silago-cog-coarse-grained-grid-based-design-for-near-tape-out-power-estimation-accuracy-at-high-level (retrieved 2026-05-24)

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