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One-pass Design of Reversible Circuits: Combining Embedding and Synthesis for Reversible Logic

Research article (IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017) · cited 71× · AI/ML
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One-pass Design of Reversible Circuits: Combining Embedding and Synthesis for Reversible Logic

Summary

One-pass Design of Reversible Circuits: Combining Embedding and Synthesis for Reversible Logic is a scholarly article[1].

Key Facts

  • One-pass Design of Reversible Circuits: Combining Embedding and Synthesis for Reversible Logic's instance of is recorded as scholarly article[2].

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Direct Wikidata claims

  1. [2] ↑ . wikidata.org.

Class ancestry

  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). One-pass Design of Reversible Circuits: Combining Embedding and Synthesis for Reversible Logic. Retrieved May 24, 2026, from https://4ort.xyz/entity/one-pass-design-of-reversible-circuits-combining-embedding-and-synthesis-for-reversible-logic
MLA “One-pass Design of Reversible Circuits: Combining Embedding and Synthesis for Reversible Logic.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/one-pass-design-of-reversible-circuits-combining-embedding-and-synthesis-for-reversible-logic.
BibTeX @misc{4ortxyz_one-pass-design-of-reversible-circuits-combining-embedding-and-synthesis-for-reversible-logic_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{One-pass Design of Reversible Circuits: Combining Embedding and Synthesis for Reversible Logic}}, year = {2026}, url = {https://4ort.xyz/entity/one-pass-design-of-reversible-circuits-combining-embedding-and-synthesis-for-reversible-logic}, note = {Accessed: 2026-05-24}}
LLM prompt According to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): One-pass Design of Reversible Circuits: Combining Embedding and Synthesis for Reversible Logic — https://4ort.xyz/entity/one-pass-design-of-reversible-circuits-combining-embedding-and-synthesis-for-reversible-logic (retrieved 2026-05-24)

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