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Energy-Efficient High-Speed ASIC Implementation of Convolutional Neural Network Using Novel Reduced Critical-Path Design

Research article (IEEE Access, 2022) · cited 19× · AI/ML
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Energy-Efficient High-Speed ASIC Implementation of Convolutional Neural Network Using Novel Reduced Critical-Path Design

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Energy-Efficient High-Speed ASIC Implementation of Convolutional Neural Network Using Novel Reduced Critical-Path Design is a scholarly article[1].

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APA 4ort.xyz Knowledge Graph. (2026). Energy-Efficient High-Speed ASIC Implementation of Convolutional Neural Network Using Novel Reduced Critical-Path Design. Retrieved May 24, 2026, from https://4ort.xyz/entity/energy-efficient-high-speed-asic-implementation-of-convolutional-neural-network-using-novel-reduced-critical-path-design
MLA “Energy-Efficient High-Speed ASIC Implementation of Convolutional Neural Network Using Novel Reduced Critical-Path Design.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/energy-efficient-high-speed-asic-implementation-of-convolutional-neural-network-using-novel-reduced-critical-path-design.
BibTeX @misc{4ortxyz_energy-efficient-high-speed-asic-implementation-of-convolutional-neural-network-using-novel-reduced-critical-path-design_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Energy-Efficient High-Speed ASIC Implementation of Convolutional Neural Network Using Novel Reduced Critical-Path Design}}, year = {2026}, url = {https://4ort.xyz/entity/energy-efficient-high-speed-asic-implementation-of-convolutional-neural-network-using-novel-reduced-critical-path-design}, note = {Accessed: 2026-05-24}}
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