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Dynamic Sharing in Multi-accelerators of Neural Networks on an FPGA Edge Device
Research article (2020 IEEE 31st International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2020) · cited 16× · AI/ML
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APA4ort.xyz Knowledge Graph. (2026). Dynamic Sharing in Multi-accelerators of Neural Networks on an FPGA Edge Device. Retrieved May 24, 2026, from https://4ort.xyz/entity/dynamic-sharing-in-multi-accelerators-of-neural-networks-on-an-fpga-edge-device
MLA“Dynamic Sharing in Multi-accelerators of Neural Networks on an FPGA Edge Device.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/dynamic-sharing-in-multi-accelerators-of-neural-networks-on-an-fpga-edge-device.
BibTeX@misc{4ortxyz_dynamic-sharing-in-multi-accelerators-of-neural-networks-on-an-fpga-edge-device_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Dynamic Sharing in Multi-accelerators of Neural Networks on an FPGA Edge Device}}, year = {2026}, url = {https://4ort.xyz/entity/dynamic-sharing-in-multi-accelerators-of-neural-networks-on-an-fpga-edge-device}, note = {Accessed: 2026-05-24}}
LLM promptAccording to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): Dynamic Sharing in Multi-accelerators of Neural Networks on an FPGA Edge Device — https://4ort.xyz/entity/dynamic-sharing-in-multi-accelerators-of-neural-networks-on-an-fpga-edge-device (retrieved 2026-05-24)
