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Co-Exploring Neural Architecture and Network-on-Chip Design for Real-Time Artificial Intelligence

Research article (2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 2020) · cited 34× · AI/ML
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Co-Exploring Neural Architecture and Network-on-Chip Design for Real-Time Artificial Intelligence

Summary

Co-Exploring Neural Architecture and Network-on-Chip Design for Real-Time Artificial Intelligence is a scholarly article[1].

Key Facts

  • Co-Exploring Neural Architecture and Network-on-Chip Design for Real-Time Artificial Intelligence's instance of is recorded as scholarly article[2].

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Direct Wikidata claims

  1. [2] ↑ . wikidata.org.

Class ancestry

  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). Co-Exploring Neural Architecture and Network-on-Chip Design for Real-Time Artificial Intelligence. Retrieved May 24, 2026, from https://4ort.xyz/entity/co-exploring-neural-architecture-and-network-on-chip-design-for-real-time-artificial-intelligence
MLA “Co-Exploring Neural Architecture and Network-on-Chip Design for Real-Time Artificial Intelligence.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/co-exploring-neural-architecture-and-network-on-chip-design-for-real-time-artificial-intelligence.
BibTeX @misc{4ortxyz_co-exploring-neural-architecture-and-network-on-chip-design-for-real-time-artificial-intelligence_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{Co-Exploring Neural Architecture and Network-on-Chip Design for Real-Time Artificial Intelligence}}, year = {2026}, url = {https://4ort.xyz/entity/co-exploring-neural-architecture-and-network-on-chip-design-for-real-time-artificial-intelligence}, note = {Accessed: 2026-05-24}}
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