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An Efficient FPGA-based Depthwise Separable Convolutional Neural Network Accelerator with Hardware Pruning

Research article (ACM Transactions on Reconfigurable Technology and Systems, 2023) · cited 19× · AI/ML
academia openalex:W4386710183
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An Efficient FPGA-based Depthwise Separable Convolutional Neural Network Accelerator with Hardware Pruning

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An Efficient FPGA-based Depthwise Separable Convolutional Neural Network Accelerator with Hardware Pruning is a scholarly article[1].

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  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). An Efficient FPGA-based Depthwise Separable Convolutional Neural Network Accelerator with Hardware Pruning. Retrieved May 24, 2026, from https://4ort.xyz/entity/an-efficient-fpga-based-depthwise-separable-convolutional-neural-network-accelerator-with-hardware-pruning
MLA “An Efficient FPGA-based Depthwise Separable Convolutional Neural Network Accelerator with Hardware Pruning.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/an-efficient-fpga-based-depthwise-separable-convolutional-neural-network-accelerator-with-hardware-pruning.
BibTeX @misc{4ortxyz_an-efficient-fpga-based-depthwise-separable-convolutional-neural-network-accelerator-with-hardware-pruning_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{An Efficient FPGA-based Depthwise Separable Convolutional Neural Network Accelerator with Hardware Pruning}}, year = {2026}, url = {https://4ort.xyz/entity/an-efficient-fpga-based-depthwise-separable-convolutional-neural-network-accelerator-with-hardware-pruning}, note = {Accessed: 2026-05-24}}
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