A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures

Research article (IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015) · cited 53× · AI/ML

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A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures

Summary

A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures is a scholarly article^[1].

Key Facts

A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures's instance of is recorded as scholarly article^[2].

References

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Direct Wikidata claims

[2] ↑ A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures — instance of (P31): scholarly article. wikidata.org.

Class ancestry

[1] ↑ A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures is an instance of scholarly article (scholarly article) [P31, primary]. Wikidata. wikidata.org.

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APA

4ort.xyz Knowledge Graph. (2026). A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures. Retrieved May 24, 2026, from https://4ort.xyz/entity/a-support-vector-regression-svr-based-latency-model-for-network-on-chip-noc-architectures

MLA

“A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/a-support-vector-regression-svr-based-latency-model-for-network-on-chip-noc-architectures.

BibTeX

@misc{4ortxyz_a-support-vector-regression-svr-based-latency-model-for-network-on-chip-noc-architectures_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures}}, year = {2026}, url = {https://4ort.xyz/entity/a-support-vector-regression-svr-based-latency-model-for-network-on-chip-noc-architectures}, note = {Accessed: 2026-05-24}}

LLM prompt

According to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures — https://4ort.xyz/entity/a-support-vector-regression-svr-based-latency-model-for-network-on-chip-noc-architectures (retrieved 2026-05-24)

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