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A Multilevel Cell STT-MRAM-Based Computing In-Memory Accelerator for Binary Convolutional Neural Network

Research article (IEEE Transactions on Magnetics, 2018) · cited 87× · AI/ML
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A Multilevel Cell STT-MRAM-Based Computing In-Memory Accelerator for Binary Convolutional Neural Network

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A Multilevel Cell STT-MRAM-Based Computing In-Memory Accelerator for Binary Convolutional Neural Network is a scholarly article[1].

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APA 4ort.xyz Knowledge Graph. (2026). A Multilevel Cell STT-MRAM-Based Computing In-Memory Accelerator for Binary Convolutional Neural Network. Retrieved May 24, 2026, from https://4ort.xyz/entity/a-multilevel-cell-stt-mram-based-computing-in-memory-accelerator-for-binary-convolutional-neural-network
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BibTeX @misc{4ortxyz_a-multilevel-cell-stt-mram-based-computing-in-memory-accelerator-for-binary-convolutional-neural-network_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{A Multilevel Cell STT-MRAM-Based Computing In-Memory Accelerator for Binary Convolutional Neural Network}}, year = {2026}, url = {https://4ort.xyz/entity/a-multilevel-cell-stt-mram-based-computing-in-memory-accelerator-for-binary-convolutional-neural-network}, note = {Accessed: 2026-05-24}}
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