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A High-Efficiency FPGA-Based Accelerator for Binarized Neural Network

Research article (Journal of Circuits Systems and Computers, 2019) · cited 11× · AI/ML
academia openalex:W2929170389
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A High-Efficiency FPGA-Based Accelerator for Binarized Neural Network

Summary

A High-Efficiency FPGA-Based Accelerator for Binarized Neural Network is a scholarly article[1].

Key Facts

  • A High-Efficiency FPGA-Based Accelerator for Binarized Neural Network's instance of is recorded as scholarly article[2].

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Direct Wikidata claims

  1. [2] ↑ . wikidata.org.

Class ancestry

  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). A High-Efficiency FPGA-Based Accelerator for Binarized Neural Network. Retrieved May 24, 2026, from https://4ort.xyz/entity/a-high-efficiency-fpga-based-accelerator-for-binarized-neural-network
MLA “A High-Efficiency FPGA-Based Accelerator for Binarized Neural Network.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/a-high-efficiency-fpga-based-accelerator-for-binarized-neural-network.
BibTeX @misc{4ortxyz_a-high-efficiency-fpga-based-accelerator-for-binarized-neural-network_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{A High-Efficiency FPGA-Based Accelerator for Binarized Neural Network}}, year = {2026}, url = {https://4ort.xyz/entity/a-high-efficiency-fpga-based-accelerator-for-binarized-neural-network}, note = {Accessed: 2026-05-24}}
LLM prompt According to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): A High-Efficiency FPGA-Based Accelerator for Binarized Neural Network — https://4ort.xyz/entity/a-high-efficiency-fpga-based-accelerator-for-binarized-neural-network (retrieved 2026-05-24)

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