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A 640M pixel/s 3.65mW sparse event-driven neuromorphic object recognition processor with on-chip learning

Research article (2015 Symposium on VLSI Circuits (VLSI Circuits), 2015) · cited 80× · AI/ML
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A 640M pixel/s 3.65mW sparse event-driven neuromorphic object recognition processor with on-chip learning

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A 640M pixel/s 3.65mW sparse event-driven neuromorphic object recognition processor with on-chip learning is a scholarly article[1].

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  • A 640M pixel/s 3.65mW sparse event-driven neuromorphic object recognition processor with on-chip learning's instance of is recorded as scholarly article[2].

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  1. [1] ↑ . Wikidata. wikidata.org.

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APA 4ort.xyz Knowledge Graph. (2026). A 640M pixel/s 3.65mW sparse event-driven neuromorphic object recognition processor with on-chip learning. Retrieved May 24, 2026, from https://4ort.xyz/entity/a-640m-pixel-s-3-65mw-sparse-event-driven-neuromorphic-object-recognition-processor-with-on-chip-learning
MLA “A 640M pixel/s 3.65mW sparse event-driven neuromorphic object recognition processor with on-chip learning.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/a-640m-pixel-s-3-65mw-sparse-event-driven-neuromorphic-object-recognition-processor-with-on-chip-learning.
BibTeX @misc{4ortxyz_a-640m-pixel-s-3-65mw-sparse-event-driven-neuromorphic-object-recognition-processor-with-on-chip-learning_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{A 640M pixel/s 3.65mW sparse event-driven neuromorphic object recognition processor with on-chip learning}}, year = {2026}, url = {https://4ort.xyz/entity/a-640m-pixel-s-3-65mw-sparse-event-driven-neuromorphic-object-recognition-processor-with-on-chip-learning}, note = {Accessed: 2026-05-24}}
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