A 60Gbps DPI Prototype based on Memory-Centric FPGA
Research article (Proceedings of the 2016 ACM SIGCOMM Conference, 2016) · cited 12× · AI/ML
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- [2] ↑ A 60Gbps DPI Prototype based on Memory-Centric FPGA — instance of (P31): scholarly article. wikidata.org.
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4ort.xyz Knowledge Graph. (2026). A 60Gbps DPI Prototype based on Memory-Centric FPGA. Retrieved May 24, 2026, from https://4ort.xyz/entity/a-60gbps-dpi-prototype-based-on-memory-centric-fpga
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“A 60Gbps DPI Prototype based on Memory-Centric FPGA.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/a-60gbps-dpi-prototype-based-on-memory-centric-fpga.
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@misc{4ortxyz_a-60gbps-dpi-prototype-based-on-memory-centric-fpga_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{A 60Gbps DPI Prototype based on Memory-Centric FPGA}}, year = {2026}, url = {https://4ort.xyz/entity/a-60gbps-dpi-prototype-based-on-memory-centric-fpga}, note = {Accessed: 2026-05-24}}
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