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A 22nm 832Kb Hybrid-Domain Floating-Point SRAM In-Memory-Compute Macro with 16.2-70.2TFLOPS/W for High-Accuracy AI-Edge Devices
Research article (2023 IEEE International Solid- State Circuits Conference (ISSCC), 2023) · cited 89× · AI/ML
A 22nm 832Kb Hybrid-Domain Floating-Point SRAM In-Memory-Compute Macro with 16.2-70.2TFLOPS/W for High-Accuracy AI-Edge Devices
Summary
A 22nm 832Kb Hybrid-Domain Floating-Point SRAM In-Memory-Compute Macro with 16.2-70.2TFLOPS/W for High-Accuracy AI-Edge Devices is a scholarly article[1].
Key Facts
A 22nm 832Kb Hybrid-Domain Floating-Point SRAM In-Memory-Compute Macro with 16.2-70.2TFLOPS/W for High-Accuracy AI-Edge Devices's instance of is recorded as scholarly article[2].
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APA4ort.xyz Knowledge Graph. (2026). A 22nm 832Kb Hybrid-Domain Floating-Point SRAM In-Memory-Compute Macro with 16.2-70.2TFLOPS/W for High-Accuracy AI-Edge Devices. Retrieved May 24, 2026, from https://4ort.xyz/entity/a-22nm-832kb-hybrid-domain-floating-point-sram-in-memory-compute-macro-with-16-2-70-2tflops-w-for-high-accuracy-ai-edge-