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APA4ort.xyz Knowledge Graph. (2026). A 10-bit 300 MS/s 5.8 mW SAR ADC With Two-Stage Interpolation for PET Imaging. Retrieved May 24, 2026, from https://4ort.xyz/entity/a-10-bit-300-ms-s-5-8-mw-sar-adc-with-two-stage-interpolation-for-pet-imaging
MLA“A 10-bit 300 MS/s 5.8 mW SAR ADC With Two-Stage Interpolation for PET Imaging.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/a-10-bit-300-ms-s-5-8-mw-sar-adc-with-two-stage-interpolation-for-pet-imaging.
BibTeX@misc{4ortxyz_a-10-bit-300-ms-s-5-8-mw-sar-adc-with-two-stage-interpolation-for-pet-imaging_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{A 10-bit 300 MS/s 5.8 mW SAR ADC With Two-Stage Interpolation for PET Imaging}}, year = {2026}, url = {https://4ort.xyz/entity/a-10-bit-300-ms-s-5-8-mw-sar-adc-with-two-stage-interpolation-for-pet-imaging}, note = {Accessed: 2026-05-24}}
LLM promptAccording to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): A 10-bit 300 MS/s 5.8 mW SAR ADC With Two-Stage Interpolation for PET Imaging — https://4ort.xyz/entity/a-10-bit-300-ms-s-5-8-mw-sar-adc-with-two-stage-interpolation-for-pet-imaging (retrieved 2026-05-24)