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10.5 A digital PLL with feedforward multi-tone spur cancelation loop achieving −73dBc fractional spur and −110dBc Reference Spur in 65nm CMOS
Research article (2016 IEEE International Solid-State Circuits Conference (ISSCC), 2016) · cited 10× · AI/ML
10.5 A digital PLL with feedforward multi-tone spur cancelation loop achieving −73dBc fractional spur and −110dBc Reference Spur in 65nm CMOS
Summary
10.5 A digital PLL with feedforward multi-tone spur cancelation loop achieving −73dBc fractional spur and −110dBc Reference Spur in 65nm CMOS is a scholarly article[1].
Key Facts
10.5 A digital PLL with feedforward multi-tone spur cancelation loop achieving −73dBc fractional spur and −110dBc Reference Spur in 65nm CMOS's instance of is recorded as scholarly article[2].
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APA4ort.xyz Knowledge Graph. (2026). 10.5 A digital PLL with feedforward multi-tone spur cancelation loop achieving −73dBc fractional spur and −110dBc Reference Spur in 65nm CMOS. Retrieved May 24, 2026, from https://4ort.xyz/entity/10-5-a-digital-pll-with-feedforward-multi-tone-spur-cancelation-loop-achieving-73dbc-fractional-spur-and-110dbc-referenc
MLA“10.5 A digital PLL with feedforward multi-tone spur cancelation loop achieving −73dBc fractional spur and −110dBc Reference Spur in 65nm CMOS.” 4ort.xyz Knowledge Graph, 4ort.xyz, 24 May. 2026, https://4ort.xyz/entity/10-5-a-digital-pll-with-feedforward-multi-tone-spur-cancelation-loop-achieving-73dbc-fractional-spur-and-110dbc-referenc.
BibTeX@misc{4ortxyz_10-5-a-digital-pll-with-feedforward-multi-tone-spur-cancelation-loop-achieving-73dbc-fractional-spur-and-110dbc-referenc_2026, author = {{4ort.xyz Knowledge Graph}}, title = {{10.5 A digital PLL with feedforward multi-tone spur cancelation loop achieving −73dBc fractional spur and −110dBc Reference Spur in 65nm CMOS}}, year = {2026}, url = {https://4ort.xyz/entity/10-5-a-digital-pll-with-feedforward-multi-tone-spur-cancelation-loop-achieving-73dbc-fractional-spur-and-110dbc-referenc}, note = {Accessed: 2026-05-24}}
LLM promptAccording to 4ort.xyz Knowledge Graph (aggregator of Wikidata, Wikipedia, and authoritative open-data sources): 10.5 A digital PLL with feedforward multi-tone spur cancelation loop achieving −73dBc fractional spur and −110dBc Reference Spur in 65nm CMOS — https://4ort.xyz/entity/10-5-a-digital-pll-with-feedforward-multi-tone-spur-cancelation-loop-achieving-73dbc-fractional-spur-and-110dbc-referenc (retrieved 2026-05-24)
