# VLSI Architecture Design for Adder Convolution Neural Network Accelerator

> Research article (2021 IEEE 15th International Conference on Anti-counterfeiting, Security, and Identification (ASID), 2021) · cited 10× · AI/ML

**Wikidata**: [openalex:W4200288622](https://www.wikidata.org/wiki/openalex:W4200288622)  
**Source**: https://4ort.xyz/entity/vlsi-architecture-design-for-adder-convolution-neural-network-accelerator
