# Triple-Phase Watermarking for Reusable IP Core Protection During Architecture Synthesis

> Research article (IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017) · cited 41× · AI/ML

**Wikidata**: [openalex:W2736598678](https://www.wikidata.org/wiki/openalex:W2736598678)  
**Source**: https://4ort.xyz/entity/triple-phase-watermarking-for-reusable-ip-core-protection-during-architecture-synthesis