# STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator

> Research article (IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017) · cited 14× · AI/ML

**Wikidata**: [openalex:W2580984468](https://www.wikidata.org/wiki/openalex:W2580984468)  
**Source**: https://4ort.xyz/entity/stt-ram-buffer-design-for-precision-tunable-general-purpose-neural-network-accelerator