# RapidLayout: Fast Hard Block Placement of FPGA-Optimized Systolic Arrays using Evolutionary Algorithms

> Research article (2020 30th International Conference on Field-Programmable Logic and Applications (FPL), 2020) · cited 10× · AI/ML

**Wikidata**: [openalex:W3093761467](https://www.wikidata.org/wiki/openalex:W3093761467)  
**Source**: https://4ort.xyz/entity/rapidlayout-fast-hard-block-placement-of-fpga-optimized-systolic-arrays-using-evolutionary-algorithms
