# Qualification method for a 1 MGy-tolerant front-end chip designed in 65 nm CMOS for the read-out of remotely operated sensors and actuators during maintenance in ITER

> Research article (Fusion Engineering and Design, 2015) · cited 11× · AI/ML

**Wikidata**: [openalex:W2049572213](https://www.wikidata.org/wiki/openalex:W2049572213)  
**Source**: https://4ort.xyz/entity/qualification-method-for-a-1-mgy-tolerant-front-end-chip-designed-in-65-nm-cmos-for-the-read-out-of-remotely-operated-se