# Power, Area, Speed, and Security (PASS) Trade-Offs of NIST PQC Signature Candidates Using a C to ASIC Design Flow

> Research article (2019 IEEE 37th International Conference on Computer Design (ICCD), 2019) · cited 11× · AI/ML

**Wikidata**: [openalex:W3006575101](https://www.wikidata.org/wiki/openalex:W3006575101)  
**Source**: https://4ort.xyz/entity/power-area-speed-and-security-pass-trade-offs-of-nist-pqc-signature-candidates-using-a-c-to-asic-design-flow