# LSAC: A Low-Power Adder Tree for Digital Computing-in-Memory by Sparsity and Approximate Circuits Co-Design

> Research article (IEEE Transactions on Circuits & Systems II Express Briefs, 2023) · cited 18× · AI/ML

**Wikidata**: [openalex:W4385819615](https://www.wikidata.org/wiki/openalex:W4385819615)  
**Source**: https://4ort.xyz/entity/lsac-a-low-power-adder-tree-for-digital-computing-in-memory-by-sparsity-and-approximate-circuits-co-design