# Local bit line 8T SRAM based in-memory computing architecture for energy-efficient linear error correction codec implementation

> Research article (Microelectronics Journal, 2023) · cited 11× · AI/ML

**Wikidata**: [openalex:W4367302043](https://www.wikidata.org/wiki/openalex:W4367302043)  
**Source**: https://4ort.xyz/entity/local-bit-line-8t-sram-based-in-memory-computing-architecture-for-energy-efficient-linear-error-correction-codec-impleme