# floating junction gate random-access memory

> type of computer memory invented by Oriental Semiconductor Co., Ltd.

**Wikidata**: [Q5425999](https://www.wikidata.org/wiki/Q5425999)  
**Wikipedia**: [English](https://en.wikipedia.org/wiki/FJG_RAM)  
**Source**: https://4ort.xyz/entity/floating-junction-gate-random-access-memory

## Summary
Floating junction gate random-access memory (FJG-RAM) is a non-volatile form of computer memory invented by Oriental Semiconductor Co., Ltd. Unlike DRAM or SRAM, it retains stored data even when power is removed, placing it in the same functional class as flash memory but with random-access capabilities.

## Key Facts
- **Inventor**: Oriental Semiconductor Co., Ltd.
- **Memory class**: Non-volatile random-access memory (NVRAM)
- **Aliases**: FJG-RAM, floating junction gate RAM, FJG RAM
- **Freebase ID**: /m/0520qm2
- **Wikipedia title**: FJG RAM
- **Wikipedia languages**: English only
- **Wikidata sitelinks**: 1 (English Wikipedia)

## FAQs
### Q: What makes FJG-RAM different from DRAM or SRAM?
A: FJG-RAM is non-volatile, so it keeps its data without continuous power. DRAM and SRAM lose their contents as soon as power is removed.

### Q: Who created FJG-RAM?
A: Oriental Semiconductor Co., Ltd. is credited with inventing this memory type.

### Q: Is FJG-RAM available for consumer purchase?
A: Public datasheets or commercial product listings have not surfaced; the technology appears to remain at the research or patent stage.

## Why It Matters
Non-volatile memories like FJG-RAM sit at the intersection of speed and persistence: they promise byte-addressable writes and reads at RAM-like latency while eliminating the need for refresh power. If manufacturable at competitive densities and cost, such a technology could collapse the traditional memory hierarchy, removing the separate flash or disk tier used for “cold” storage. For mobile devices, that translates into instant-on capability and longer battery life; for data centers, it could mean crash-consistent in-memory databases that don’t need lengthy reload times after power outages. Oriental Semiconductor’s floating-junction-gate approach is one of several experimental paths—alongside MRAM, ReRAM, and phase-change memories—toward universal memory. Even if FJG-RAM itself has not reached mass production, its published cell structure and bias schemes add to the industry’s toolbox, offering reference points that larger manufacturers can license, refine, or circumvent when designing next-generation non-volatile arrays.

## Notable For
- **Single-company origin**: Developed entirely by Oriental Semiconductor Co., Ltd., not a consortium.
- **Distinctive name**: “Floating junction gate” hints at a hybrid MOS-JFET cell structure unlike mainstream charge-trap or floating-gate flash.
- **Sparse public footprint**: Only one Wikipedia language edition and one Wikidata sitelink, indicating limited disclosure or commercial traction.
- **Patent-level visibility**: Cited in technical discussions as an example of novel non-volatile RAM concepts beyond familiar MRAM/PRAM approaches.

## Body
### Classification and Relationship to Other Memories
FJG-RAM is explicitly listed as a subclass of “non-volatile random-access memory,” a category whose members retain data without external power yet allow random read/write access. This distinguishes it from volatile SRAM and DRAM, which need continuous voltage to maintain state, and from block-oriented non-volatile memories such as NAND flash.

### Naming and Aliases
The acronym “FJG-RAM” is the most compact reference; the spelled-out form “floating junction gate random-access memory” appears in technical summaries. Oriental Semiconductor’s own literature alternates between “FJG RAM” and “floating junction gate RAM,” all referring to the same cell concept.

### Public Documentation
No academic papers independent of the original assignee have been located, and the sole Wikipedia article (titled “FJG RAM”) provides the highest concentration of searchable detail. The corresponding Wikidata item aggregates aliases, classification, and sitelinks, but offers no performance numbers, cell size, or endurance specifications.