# DRC<sup>2</sup>: Dynamically Reconfigurable Computing Circuit based on memory architecture

> Research article (2016 IEEE International Conference on Rebooting Computing (ICRC), 2016) · cited 33× · AI/ML

**Wikidata**: [openalex:W2554194110](https://www.wikidata.org/wiki/openalex:W2554194110)  
**Source**: https://4ort.xyz/entity/drc-sup-2-sup-dynamically-reconfigurable-computing-circuit-based-on-memory-architecture