# Design of FPGA-Implemented Reed–Solomon Erasure Code (RS-EC) Decoders With Fault Detection and Location on User Memory

> Research article (IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021) · cited 13× · AI/ML

**Wikidata**: [openalex:W3147637518](https://www.wikidata.org/wiki/openalex:W3147637518)  
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