# Configurable FPGA Packet Parser for Terabit Networks with Guaranteed Wire-Speed Throughput

> Research article (Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018) · cited 26× · AI/ML

**Wikidata**: [openalex:W2792814254](https://www.wikidata.org/wiki/openalex:W2792814254)  
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